Specification and Verification of the Triple-Modular Redundancy Fault Tolerant System using CSP

被引：0
|
作者：
Tan, Lanfang [1 ]
Tan, Qingping [1 ]
Li, Jianli [1 ]
机构：
[1] Natl Univ Def Technol, Sch Comp, Changsha, Hunan, Peoples R China
来源：
PROCEEDINGS OF THE FOURTH INTERNATIONAL CONFERENCE ON DEPENDABILITY (DEPEND 2011) | 2011年
关键词：
TMR System fault tolerance; verification; CSP;
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
A case study on the application of Communicating Sequential Processes (CSP) to the specification and verification of fault tolerant systems is presented. The Triple-Modular Redundancy (TMR) mechanism is a classical design technique for tolerating hardware errors. By specifying the behavior of the faultless module as a CSP process, the behavior of TMR system suffering from hardware errors can be verified as a refinement of the one of the faultless module.
引用
收藏
页码：14 / 17
页数：4
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