A Monolithic 12-Bit Digitally Calibrated D/A Converter

被引：0
|
作者：
Liu, Hong [1 ]
Tang, Ning [2 ]
Wang, Mingliang [1 ]
Xia, Zhao [1 ]
Zhang, Ke [1 ]
Tong, Tian [1 ]
机构：
[1] Chinese Acad Sci, Shanghai Inst Microsyst & Informat Technol, Shanghai, Peoples R China
[2] China Elect Technol Grp Corp, Res Inst 47, Beijing, Peoples R China
来源：
2013 IEEE 20TH INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS, AND SYSTEMS (ICECS) | 2013年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A 12-bit monolithic D/A converter has been developed. The principle of proportional match design in the resistor switch network, its structural characteristics and the resistor network for calibration are elaborated. In order to cancel the variation of switch network resistance value caused by process, temperature and voltage, a new calibration circuit has been proposed. Finally this paper proposed an automatic calibration algorithm based on fuse trim, which can significantly improve the efficiency of trimming and lower the cost of DAC chip. Simulation results show that the linear error, differential error and full scale error of the converter all meet the requirements of 12-bit resolution. Operating at 15V, the DAC achieves a settling time of 1us for full scale voltage.
引用
收藏
页码：449 / 452
页数：4
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