共 50 条
- [1] 2.5D Advanced System-in-Package: Processes, Materials & Integration Aspects SILICON COMPATIBLE MATERIALS, PROCESSES, AND TECHNOLOGIES FOR ADVANCED INTEGRATED CIRCUITS AND EMERGING APPLICATIONS 4, 2014, 61 (03): : 183 - 190
- [2] Linking geometrical and electrical parameters of flex substrate vertical interconnects for 2.5D system-in-package design 57TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, 2007 PROCEEDINGS, 2007, : 1861 - +
- [3] VALIDATING 2.5D SYSTEM-in-PACKAGE INTER-DIE COMMUNICATION ON SILICON INTERPOSER 2014 IEEE ELECTRICAL DESIGN OF ADVANCED PACKAGING & SYSTEMS SYMPOSIUM (EDAPS), 2014, : 65 - 68
- [4] On the Design of energy-Efficient I/O Circuits for Interposer-based 2.5D System-in-Package 2018 IEEE SOI-3D-SUBTHRESHOLD MICROELECTRONICS TECHNOLOGY UNIFIED CONFERENCE (S3S), 2018,
- [5] ESD Verification of a 2.5D CoWoS Package Design 2022 INTERNATIONAL EOS/ESD SYMPOSIUM ON DESIGN AND SYSTEM (IEDS), 2022,
- [6] Low thermal resistance design for a 2.5D package 2013 14TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY (ICEPT), 2013, : 431 - +
- [7] Imitation chip design based on TSV 2.5D package 2015 16TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY, 2015,
- [8] Coupling Extraction and Optimization for Heterogeneous 2.5D Chiplet-Package Co-Design 2020 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER AIDED-DESIGN (ICCAD), 2020,
- [9] 4-dimensional design analysis and optimization of system-in-package PROCEEDINGS OF THE 7TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE, VOLS. 1 AND 2, 2005, : 321 - 327
- [10] Physical design of the "2.5D" stacked system 21ST INTERNATIONAL CONFERENCE ON COMPUTER DESIGN, PROCEEDINGS, 2003, : 211 - 217