Implementation of Hardware-in-the-Loop Real-time Simulation of Per-Unit Doubly-fed Induction Generator

被引:0
|
作者
Wang, Siyu [1 ]
Zhan, Pengfei [1 ]
Wang, Ning [1 ]
机构
[1] Shanghai Univ, Coll Elect Engn & Automat, Shanghai, Peoples R China
关键词
DFIG system; per-unit modeling; HIL; FPGA; SYSTEMS;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In order to overcome the lack of generality of traditional doubly-fed induction generator (DFIG) system modeling, and to accelerate its rapid verification, a per-unit DFIG hardware-in-the-loop real-time simulation platform (HIL Platform) based on FPGA is designed in this paper. In this platform, DSP is used as the real controller, and the per-unit real-time models of DFIG and back-to-back inverter are built in FPGA. The integrated hierarchical and modular design method is adopted, and the hardware description language (HDL) Verilog is applied. Finally, under the same working conditions, no-load experiments and grid-connected power generation experiments were respectively carried out on the HIL platform and the full-physical platform. Based on the experimental results of the full-physical platform, the comparison of the experimental results shows that the HIL platform constructed in this paper has universality, real-time performance and reliability.
引用
收藏
页码:74 / 78
页数:5
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