Reversible Realization of Quaternary Decoder, Multiplexer, and Demultiplexer Circuits

被引:7
|
作者
Khan, Mozammel H. A. [1 ]
机构
[1] East West Univ, Dept Comp Sci & Engn, 43 Mohakhali, Dhaka 1212, Bangladesh
关键词
D O I
10.1109/ISMVL.2008.33
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Quaternary logic is very suitable for encoded realization of binary logic functions by grouping 2-bits together into quaternary digits. This sort of quaternary encoded reversible realization of binary logic function requires half times input/output lines than the original binary reversible realization. Quaternary decoder, multiplexer, and demultiplexer are very important building blocks of quaternary digital systems. In this paper, we show reversible realization of these circuits using quaternary reversible gates like quaternary shift gates (QSG), quaternary controlled shift gates (QCSG), and quaternary Toffoli gates (QTG). We also show the realization of multi-digit QCSG and QTG using QSG and QCSG, which are realizable using liquid ion-trap quantum technology and other reversible technologies.
引用
收藏
页码:208 / 213
页数:6
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