A Sub-0.5V Charge Pump Circuit for Resistive RAM (ReRAM) Enabled Low Supply Voltage Nonvolatile Logics and Nonvoaltile Processors

被引：0

作者：

Chang, Meng-Fan ^{[1
]}

Shen, Shin-Jang ^{[1
]}

Lu, Yi-Lun ^{[1
]}

Yang, Yih-Shan ^{[1
]}

Hung, Jui-Yu ^{[1
]}

Wu, Che-Wei ^{[1
]}

Jhang, Yan-Bing ^{[1
]}

Chen, Wei-how ^{[1
]}

Hu, Han-Wen ^{[1
]}

机构：

[1] Natl Tsing Hua Univ, Dept Elect Engn, Hisnchu, Taiwan

来源：

2016 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC) | 2016年

关键词：

ReRAM; charge pump; low-voltage; memory; FLASH EEPROM; SCHEME;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Many processors that use energy harvesting devices for low-power computing operations and zero-standby-current power-off storage require embedded nonvolatile memory (eNVM) devices and nonvolatile logics (nvLogics) with low voltage capability. However, conventional eNVMs and nvLogics are unable to perform low-voltage write operations due to a failure on the part of on-chip charge-pump circuits to provide the high write voltage and write current required by NVM devices under low supply voltage (VDD). This study developed hybrid boost-voltage (HBV) and hybrid-device (HD) schemes for a single-supply charge pump to enable low-VDD operations with sufficient voltage and current for the write operation of ReRAM-based eNVM and nvLogics. A HBV-HD CP fabricated in a 65nm testchip achieved VDDmin of less than 0.5V.

引用

页码：342 / 345

页数：4

共 3 条

[1] A Low-Power Subthreshold-to-Superthreshold Level-Shifter for Sub-0.5V Embedded Resistive RAM (ReRAM) Macro in Ultra Low-Voltage Chips
Chang, Meng-Fan
Wu, Che-Wei
Hung, Jui-Yu
King, Ya-Chin
Lin, Chorng-Jung
Ho, Mon-Shu
Kuo, Chia-Cheng
Sheu, Shyh-Shyuan
[J]. 2014 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS), 2014, : 695 - 698
[2] A low-power subthreshold-to-superthreshold level-shifter for sub-0.5V embedded resistive RAM (ReRAM) macro in ultra low-voltage chips
20153101081421
[J]. (1) Department of Electrical Engineering, National Tsing Hua University, Hisnchu, Taiwan; (2) Department of Physics, National Chung Hsing University, Taichung, Taiwan; (3) Electronics and Optoelectronics, Research Laboratories (EOL), ITRI, Hisnchu, Taiwan, 1600, IEEE; IEEE Circuits and Systems Society (Institute of Electrical and Electronics Engineers Inc., United States):
[3] A Low-Voltage Bulk-Drain-Driven Read Scheme for Sub-0.5 V 4 Mb 65 nm Logic-Process Compatible Embedded Resistive RAM (ReRAM) Macro
Chang, Meng-Fan
Wu, Che-Wei
Kuo, Chia-Cheng
Shen, Shin-Jang
Yang, Sue-Meng
Lin, Ku-Feng
Shen, Wen-Chao
King, Ya-Chin
Lin, Chorng-Jung
Chih, Yu-Der
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2013, 48 (09) : 2250 - 2259

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