Design of Fractional-N Frequency Synthesizer for FSK Transceiver

被引:0
|
作者
Li, Ming [1 ]
Wan, Peiyuan [1 ]
机构
[1] Beijing Univ Technol, Coll Elect Informat & Control Engn, Beijing Embedded Syst Key Lab, Beijing 100124, Peoples R China
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this Paper, a fractional-N frequency synthesizer fabricated in a 0.18jim process is designed for a FSK transceiver. The precision of the charge pump can be improved by exploiting the op amplifier. Based on capacitance multiplication technique, the area of loop filter is reduced. The fractional-N divider function is realized by the sigma delta modulator. FIR filter is designed in the input stage of sigma-delta modulator to avoid spectrum aliasing. The data of sigma delta modulator can be stably transmitted to programmable frequency divider without meta-stability. The minimum step of frequency is 28Hz with 30MHz reference clock. The measurement results show that the phase noise is -129.69dBc/Hz @l-MHz offset with centered frequency at 390MHz.
引用
收藏
页码:1425 / 1427
页数:3
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