Parameterized Design and Evaluation of Bandwidth Compressor for Floating-Point Data Streams in FPGA-Based Custom Computing

被引：0

作者：

Ueno, Tomohiro ^{[1
]}

Kono, Yoshiaki ^{[1
]}

Sano, Kentaro ^{[1
]}

Yamamoto, Satoru ^{[1
]}

机构：

[1] Tohoku Univ, Grad Sch Informat Sci, Aoba Ku, Sendai, Miyagi 9808579, Japan

来源：

RECONFIGURABLE COMPUTING: ARCHITECTURES, TOOLS AND APPLICATIONS | 2013年 / 7806卷

关键词：

bandwidth compression; floating-point data stream; custom computing; parameterized design; LOSSLESS COMPRESSION;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

We are applying bandwidth compression to enhance performance of FPGA-based custom computing. This paper presents and evaluates hardware design of a bandwidth compressor and decompressor for a floating-point data stream of various bit width. We show their structures parameterized for a bit width of an input word. Through FPGA-based prototype implementation, we evaluate the resource utilization, frequency, and compression ratio. The expermental results show that the compressor and decompressor for 32-bit and 64-bit floating-point numbers achieve bandwidth reduction at a ratio of 3.1 and 1.8 for 2D data of fluid dynamics computation, while they require only small area and operate at higher than 200 MHz.

引用

页码：90 / 102

页数：13

共 42 条

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