A NOVEL SPACE VECTOR PULSE WIDTH MODULATION SCHEME FOR DIODE CLAMPED MULTILEVEL INVERTERS

被引：0
|
作者：
Kannapiran, E. [1 ]
Chinnaiyan, V. Kumar [1 ]
Gopinath, M. [1 ]
机构：
[1] Dr NGP Inst Technol, Dept Elect & Elect Engn, Coimbatore 641048, Tamil Nadu, India
来源：
2014 INTERNATIONAL CONFERENCE ON GREEN COMPUTING COMMUNICATION AND ELECTRICAL ENGINEERING (ICGCCEE) | 2014年
关键词：
DCMLI; Multilevel Inverter; THD; Sine Pulse Width Modulation; Space Vector Pulse Width Modulation; PWM; GENERATION;
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
A Space Vector Pulse Width Modulation (SVPWM) scheme for diode clamped multilevel inverters is proposed. The proposed Pulse Width Modulation scheme generates the inverter leg switching pulses from the sampled reference phase voltage. The SVPWM scheme, presented for diode clamped multilevel inverters, can also work in the over modulation range, using only the sampled amplitudes of reference phase voltages. The proposed PWM technique does not involve any sector identification and thus considerably reduces the computation time when compared to the conventional Space Vector PWM technique. The proposed PWM signal generation scheme can be used for any multilevel inverter configuration.
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页数：7
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