Experimental Evaluation of a Random Frequency PWM inverter scheme

This paper proposes a Random Frequency PWM synchronized for a three phase inverter implemented with use of FPGA and applied to a I-hp induction motor drive system for the reduction of harmonics and improvement of fundamental peak voltage. For providing alternating output voltage with a specific magnitude and frequency to industrial applications, three-phase inverter is preferred. The gating signals to the inverter are produced by means of Random Frequency PWM to significantly reduce harmonics in comparison to currently used PWMs. FPGA is used to produce gating signals to the switches in a three-phase bridge inverter since a faster speed of operation is needed. The simulation is carried on VHSIC Hardware Description Language (VHDL) using ModelSim. Then, this VHDL model is imported into Matlab environment and co-simulated using HDL Cosimulation tool box. The simulation and experimental results are presented with a view to determine whether Random Frequency PWM performs better in terms of fundamental voltage and Total Harmonic Distortion.