Design & validation of the Pentium® III and Pentium® 4 processors power delivery

被引：45
|
作者：
Rahal-Arabi, T [1 ]
Taylor, G [1 ]
Ma, M [1 ]
Webb, C [1 ]
机构：
[1] Intel Corp, Log Technol Dev, Santa Clara, CA 95051 USA
来源：
2002 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS | 2002年
关键词：
D O I：
10.1109/VLSIC.2002.1015090
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
In this paper, we present an empirical approach for the validation of the power supply impedance model. The model is widely used to design the power delivery for high performance systems. For this purpose, several silicon wafers of the Pentium(R) III and Pentium(R) 4 processors were built with various amount of decoupling. The measured data showed significant discrepancies with the model predictions and provided useful insights in investigating the model regions of validity.
引用
收藏
页码：220 / 223
页数：4
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