Metrology strategy for next generation semiconductor manufacturing

被引：2
|
作者：
Diebold, AC [1 ]
机构：
[1] SEMATECH, Austin, TX 78741 USA
来源：
ISSM 2000: NINTH INTERNATIONAL SYMPOSIUM ON SEMICONDUCTOR MANUFACTURING, PROCEEDINGS | 2000年
关键词：
metrology; roadmap; critical dimensions; gate dielectric; low k;
D O I：
10.1109/ISSM.2000.993623
中图分类号：
T [工业技术];
学科分类号：
08 ;
摘要：
Metrology technology for the 100 nm and 70 rim generation faces many challenges. Although the areas of Lithography, Front End Processes (transistor and capacitor fabrication), and (on chip) Interconnect Metrology are often considered independent, materials and process integration issues will drive a total picture viewpoint for next generation measurements. In this paper, the key measurement requirements and potential solutions are discussed in terms of a total solution. The results of recent Studies will provide justification for the elements of the strategy.
引用
收藏
页码：91 / 93
页数：3
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