A Current-mode DC-DC Converter using a Quadratic Slope Compensation Scheme

被引：0
|
作者：
Kawabata, Chihiro [1 ]
Sugimoto, Yasuhiro [1 ]
机构：
[1] Chuo Univ, Grad Sch EE&C Engn, Tokyo 1128551, Japan
来源：
PROCEEDINGS OF THE ASP-DAC 2009: ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 2009 | 2009年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
A quadratic slope compensation scheme for a current-mode DC-DC converter to obtain stable frequency characteristics without depending on the input and output voltages is proposed. A 5 MHz and 500 mA buck DC-DC converter with input voltages ranging from 3.3 V to 2.5 V and with output voltages ranging from 2.5 V to 0.5 V was fabricated by using a 0.35 mu m CMOS process to verify the effectiveness of the scheme. Little variation of frequency characteristics at frequencies above 200 KHz for the various input and output voltages was observed.
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页码：113 / 114
页数：2
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