EUVL square mask patterning with TaN absorber

被引:5
|
作者
Yan, PY [1 ]
Ma, A [1 ]
Huang, YC [1 ]
Stoehr, B [1 ]
Valdivia, J [1 ]
机构
[1] Intel Corp, Santa Clara, CA 95052 USA
关键词
EUVL mask; EUV lithography; TaN absorber; TaN etch;
D O I
10.1117/12.468102
中图分类号
O43 [光学];
学科分类号
070207 ; 0803 ;
摘要
Using TaN as extreme ultra-violet lithography (EUVL) mask absorber has been previously explored in wafer format(1-2). Due to substrate material difference between the square mask format and Si wafer format, e.g., electrical conductivity and thermal conductivity difference, etc., the etch process does not behave the same when mask substrate switches from the Si wafer to the square quartz substrates. With low thermal conductivity on quartz material and no backside cooling, mask etch prefers low power as compared to the Si wafer etch. In the study, we found that for a given source and bias power, the cooling of the substrate plays a role in TaN etch rate and selectivity to the buffer oxide layer. In this paper, we will present detailed study and comparison of TaN EUVL mask absorber etch characteristics for both the Si substrate and the square quartz substrate cases. The effect of source power, bias power, and backside cooling will also be discussed. The etchers used in study to etch TaN film on the wafer substrate and on the square format mask substrate have the similar configuration. With the optimized etch process, we have achieved good TaN etch profile with high etch selectivity to SiO2 buffer layer on the square quartz mask substrate.
引用
收藏
页码:431 / 436
页数:6
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