A digital multistandard paging receiver

被引：1
|
作者：
Vuori, J [1 ]
机构：
[1] Helsinki Univ Technol, FIN-02015 HUT, Finland
来源：
IEEE TRANSACTIONS ON CONSUMER ELECTRONICS | 1999年 / 45卷 / 04期
关键词：
D O I：
10.1109/30.809187
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Nowadays many different paging systems exist. Therefore it is very desirable to be able to implement the paging receiver in a way that all major paging standards can be supported. In this paper, a software radio receiver architecture which uses a signal demodulation technique based on a complex digital phase-locked loop is presented. This kind of software radio receiver can easily handle multiple paging standards, and it can easily be implemented in VLSI using the well-known CORDIC algorithm.
引用
收藏
页码：1098 / 1103
页数：6
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