Cyclic intersymbol interference of frequency-domain decision-feedback equalizer: Effect and mitigation

被引:2
|
作者
Chung, Rih-Lung [1 ]
Hwang, Jeng-Kuang
机构
[1] Yuan Ze Univ, Dept Commun Engn, Commun Signal Proc Lab, Chungli 32026, Taiwan
[2] AT&T Labs Res, Red Bank, NJ 07701 USA
关键词
block transmission; cyclic intersymbol interference (cyclic ISI); frequency-domain decision-feedback equalizer (FD-DFE); cyclic decision delay;
D O I
10.1007/s11277-006-9057-2
中图分类号
TN [电子技术、通信技术];
学科分类号
0809 ;
摘要
This paper investigates an inherent but adverse phenomenon called cyclic intersymbol interference (cyclic ISI) occurred in frequency-domain decision-feedback equalizer (FD-DFE). The cyclic ISI is due to the cyclic-prefix insertion and modulo operation of the time-domain feedback filter. To analyze and further mitigate this problem, we first formulate the FD-DFE signal model in a compact and insightful vector-matrix form, which allows an efficient derivation of the MMSE receiver coefficients. Then, by viewing the bit-error-rate profile (BERP) with respect to different starting symbol position within a symbol block, it is shown that those leading data symbols suffer more from the cyclic-ISI effect and lead to a high error floor. Seeing this, a novel FD-DFE receiver structure, called P2B-FD-DFE (parallel-two-branch FD-DFE) receiver, is proposed to overcome this problem without sacrificing spectral efficiency. It consists of two parallel cooperating branches of almost identical FD-DFE receivers designed for different cyclic decision delays. Under severe cyclic-ISI circumstances, the receiver performance can be further improved by using (1) a larger block size, and/or (2) a cascade of multiple feedback stages. Simulation results demonstrate that, in severe ISI channel, while the conventional FD-DFE exhibits a very high error floor, our proposed receiver can almost completely suppress the cyclic-ISI effect.
引用
收藏
页码:327 / 341
页数:15
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