Creep analysis of wafer level chip scale package (WLCSP) with 96.5Sn-3.5Ag and 100In lead-free solder joints and microvia build-up printed circuit board

In this study, time-temperature-dependent nonlinear analyses of lead-frec solder bumped wafer level chip scale package (WLCSP) on printed circuit board (PCB) assemblies subjected to thermal cycling conditions are presented. Two different lead-free solder alloys are considered, namely, 96.5wt percent Sn-3.5wt percent Ag and 100wt percent In. The 62wt percent Sn-36wt percent Pb-2wt percent Ag solder alloy is also considered to establish a baseline. All of these solder alloys are assumed to obey the Garofalo-Arrhenius steady-state creep constitutive law. The shear stress and shear creep strain hysteresis loops, shear stress history, and shear creep strain history at the corner solder joint are presented for a better understanding of the thermal-mechanical behaviors of lead-free solder bumped WLCSP on PCB assemblies, Also, the effects of microvia build-up PCB on the WLCSP Solderjoint reliability are investigated.