A threshold voltage model of short-channel fully-depleted recessed-source/drain (Re-S/D) UTB SOI MOSFETs including substrate induced surface potential effectsd

被引:17
|
作者
Kumar, Ajit [1 ]
Tiwari, Pramod Kumar [1 ]
机构
[1] Natl Inst Technol, Dept Elect & Commun Engn, Rourkela 769008, Orissa, India
关键词
Evanescent mode analysis; SISP; Silicon-on-insulator; Recessed-source/drain (Re-S/D); DIBL; SILICON-ON-INSULATOR;
D O I
10.1016/j.sse.2014.03.004
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, a threshold voltage model of short-channel recessed-source/drain (Re-S/D) ultra-thin body (UTB) SOI MOSFETs has been presented considering the substrate induced surface potential (SISP) to improve the model accuracy over wide ranges of device parameters and substrate bias. The potential distribution of the front and the back surfaces of the Si-body have been derived using the evanescent mode analysis method in which the channel potential is broken into one-dimensional long-channel potential and two-dimensional short-channel potential. A one-dimensional Poisson's equation has also been solved in the substrate region to account the effect of substrate induced surface potential (SISP) at substrate/buried-oxide interface. The minimum front- and back-surface potentials of silicon body have been used to obtain front and back channel threshold voltages, respectively. However, the smaller one between front and back channel threshold voltages is considered to be the threshold voltage of the device. The accuracy of the present model has been extended up to 10 nm channel length by incorporating the quantum effects induced correction term. The model results are verified with simulation results obtained using ATLAS((TM)) from Silvaco. (C) 2014 Elsevier Ltd. All rights reserved.
引用
收藏
页码:52 / 60
页数:9
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