A PAL/NTSC digital video encoder on 0.6-mu m CMOS with 66 dB typical SNR, 0.4% differential gain, and 0.2 degrees differential phase

被引:5
|
作者
Cummins, T
Murray, B
Prendergast, C
机构
[1] MASSANA LTD,DUBLIN,IRELAND
[2] ANALOG DEVICES INC,COMP PROD DIV,BOSTON,MA 02062
关键词
CCIR601; CCIR656; CMOS integrated circuits; integrated circuit packaging; power control; TV; video signal processing;
D O I
10.1109/4.597299
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A digital video encoder chip which generates phase alternate (PAL) or National Television Standards Committee (NTSC) analog video output signals is presented. The chip operates from 3 to 5.5 V; typical differential gain and phase performance at 5 V is 0.4% and 0.2 degrees, respectively, and SNR is 66 dB rms. The architecture, circuit, and die size minimization techniques used to achieve this performance in a 4 x 4 mm CMOS die are presented. The die is packaged in a 44-pin plastic quad flatpack package (7 x 7 mm). The digital logic has 47k gates and achieves an average power dissipation of 0.37 mu W/gate/MHz. The paper also covers the circuit and packaging techniques used to reduce power, - J-A, and junction temperature in this package in order to allow continuous operation in still-air ambient temperatures of 70 degrees C.
引用
收藏
页码:1091 / 1100
页数:10
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