共 49 条
- [3] I-Cache Multi-Banking and Vertical Interleaving [J]. GLSVLSI'07: PROCEEDINGS OF THE 2007 ACM GREAT LAKES SYMPOSIUM ON VLSI, 2007, : 14 - 19
- [5] Reducing tag activities for power efficiency in I-cache memory [J]. 2006 INTERNATIONAL CONFERENCE ON COMMUNICATIONS, CIRCUITS AND SYSTEMS PROCEEDINGS, VOLS 1-4: VOL 1: SIGNAL PROCESSING, 2006, : 2766 - 2770
- [6] I-Cache Tag Reduction for Low Power Chip Multiprocessor [J]. 2009 IEEE INTERNATIONAL SYMPOSIUM ON PARALLEL AND DISTRIBUTED PROCESSING WITH APPLICATIONS, PROCEEDINGS, 2009, : 196 - 202
- [8] Codes reallocation and prediction for power efficiency in I-cache memory [J]. 2005 6TH INTERNATIONAL CONFERENCE ON ASIC PROCEEDINGS, BOOKS 1 AND 2, 2005, : 164 - 167
- [9] HotSpot cache: Joint temporal and spatial locality exploitation for I-cache energy reduction [J]. ISLPED '04: PROCEEDINGS OF THE 2004 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN, 2004, : 114 - 119
- [10] WHOLE: A Low Energy I-Cache with Separate Way History [J]. 2009 IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN, 2009, : 137 - 143