Emulating Output Queueing with the Central-stage Buffered Clos Packet Switching Network

被引:0
|
作者
Ma, Xiangjie [1 ]
Lan, Julong [1 ]
Zhang, Baisheng [1 ]
机构
[1] Informat Engn Univ, Inst Informat Engn, Zhengzhou, Peoples R China
关键词
D O I
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中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Clos packet switching networks are the next step in scaling current Crossbar switches to large number of ports. The novel Central-stage Buffered Clos-network (CBC network) has the merit of fully memory-sharing among all inputs and outputs and was proved to emulate an FCFS-OQ switch with the central module count (i.e. m) about four times of the input modules count (i.e. n). This leads to high hardware complexity when designing a CBC network with high radices. This paper studies the graphic model of the CBC network, proposes analytical methods including the Stable Path Set and the Stable Vertex Pair Set, and demonstrates that the CBC network can match an FCFS-OQ switch with the central module count m>=n. By comparison, the number of the central modules in our result is only a quarter of that in previous results, and therefore the implementation of a CBC network become much simpler in practical routers.
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页码:18 / 23
页数:6
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