A Continuous-Time Sigma-Delta Modulator With Continuous-Time Delay-Based Integrator

被引:1
|
作者
Xiong, Jiu [1 ]
Liu, Jin [1 ]
Lee, Hoi [1 ]
机构
[1] Univ Texas Dallas, Dept Elect & Comp Engn, Richardson, TX 75080 USA
关键词
Analog-to-digital convertor (ADC); continuous-time sigma-delta modulator (CTSDM); continuous-time integrator; BANDWIDTH; ADC;
D O I
10.1109/TCSII.2021.3127024
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This brief presents a continuous-time sigma-delta modulator with a new integrator design based on continuous-time delays. It eliminates the need for high gain amplifiers, while providing loop gain for the modulator. It can also intrinsically compensate for the excess loop delay without additional feedback paths. The proposed integrator enables a compact modulator design that can operate under low supply voltages with high power efficiency for better process scalability. A 2(nd) order modulator prototype was fabricated in 0.18-mm CMOS. Measurement results show that it has 66dB dynamic range and 60dB SNDR over 4MHz signal bandwidth at 500MHz sampling frequency, while dissipating 1.92mW from a 1.4V supply. A FOMW of 286 fJ/conversion is achieved. It only occupies 0.039 mm(2) of chip area.
引用
收藏
页码:914 / 918
页数:5
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