The design and implementation of a block cipher ASIC

With the rapid progress of information technology, security becomes one of the key factors in information storage, communication and processing. For the reason of speed and security, the requirement for VLSI chips or modules that support data encryption and decryption increases rapidly. The design and implementation of a data ciphering processor (DCP) chip adopting block cipher algorithm is demonstrated in this paper. The cipher algorithm is qualified for commercial use. The plaintext, ciphertext and key are all 64-bit long. A top-down design flow is used in the implementation. Several methods are employed to enhance the security of the chip. A standard-cell library is also developed in the design. All the design and implementation of this DCP are performed in China. A 0.9um. double-layer-metal CMOS technology is adopted for manufacture. The chip achieves the required result in the first time implementation. The encryption/decryption processing speed reaches 40MBit/s.