Securing Multi-core Multi-threaded Packet Processors

被引：0
|
作者：
Chasaki, Danai [1 ]
机构：
[1] Villanova Univ, Dept Elect & Comp Engn, Villanova, PA 19085 USA
来源：
PROCEEDINGS OF THE EIGHTH ACM/IEEE SYMPOSIUM ON ARCHITECTURES FOR NETWORKING AND COMMUNICATIONS SYSTEMS (ANCS'12) | 2012年
关键词：
multi-core processor; attack; runtime monitoring;
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Modern routers use high-performance multi-core multithreaded packet processing systems to implement protocol operations and to forward traffic. As the number of processor cores/threads increases, it becomes increasingly difficult to track their correct operation at runtime. In this paper, we discuss how to extent our existing monitoring scheme to support highly parallel environments.
引用
收藏
页码：149 / 150
页数：2
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