Multigranular parallel algorithms for solving linear equations in VLSI circuit simulation

被引:1
|
作者
Fischer, M [1 ]
Dirks, HK
机构
[1] Infineon Technol AG, D-81541 Munich, Germany
[2] Univ Kiel, Fac Engn, D-24143 Kiel, Germany
关键词
adaptive partitioning; elimination tree (ET) multigranular; multithreaded (MT) programming; symmetric multiprocessing; very large scale integrated (VLSI) circuit simulation;
D O I
10.1109/TCAD.2004.826549
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Algorithms for parallel execution of forward elimination to solve linear equations arising from very large scale integrated circuit simulation are discussed. Here, a multigranular method is introduced, exploiting different levels of potential parallelism. According to these levels, the new method contains four phases, which are dynamically linked. Therefore, the use of an architecture with shared memory in connection with multithreaded programming enables the parallelization of a serial well-adapted sparse-matrix solver. In order to take system-specific properties into account, an adaptive partitioning is proposed. For this, the partition size is enlarged step by step as long as the measured execution time decreases. Applying this method to industrial examples an efficiency of processor usage of nearly 90%, with up to 12 processors, is reached for relevant circuits.
引用
收藏
页码:728 / 736
页数:9
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