Scalable DiffServ-over-MPLS traffic engineering with per-flow traffic policing

被引：0

作者：

Siradjev, Djakhongir ^{[1
]}

Gurin, Ivan ^{[1
]}

Kim, Young-Tak ^{[1
]}

机构：

[1] Yeungnam Univ, Dept Informat & Commun Engn, Grad Sch, Gyongsan 712749, Gyeongbook, South Korea

来源：

MANAGEMENT OF CONVERGENCE NETWORKS AND SERVICES, PROCEEDINGS | 2006年 / 4238卷

关键词：

QoS; DiffServ-over-MPLS; scalability; network processors;

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper proposes a DiffServ-over-MPLS Traffic Engineering (TE) architecture and describes the implementation of its functional blocks on Intel IXP2400 Network Processor using Intel IXA SDK 4.1 framework. We propose fast and scalable 6-tuple range-match classifier, which allows traffic policing procedures to operate on per-flow level, and a scalable low-jitter Deficit Round Robin (DRR) scheduler that can provide bandwidth guarantees on LSP level. The proposed DiffServ-over-MPLS TE functional blocks have been implemented on Intel IXDP2400 platform for up to 4,096 flows mapped to LLSPs, and can handle an aggregated traffic rate of 2.4Gbps.

引用

页码：509 / 512

页数：4

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