On the Design of Ultra Low Noise Amplifiers for ENG Recording

被引:0
|
作者
Arnaud, Alfredo [1 ]
Bremermann, Martin [1 ]
Gak, Joel [1 ]
Miguez, Matias [1 ]
机构
[1] DIE Univ Catolica, Montevideo, Uruguay
关键词
Analog design; CMOS; low-power; low-noise;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Due to the extremely low amplitude of the input signals, the design of electro-neurgo-graph (ENG) amplifiers normally involves special care for flicker and thermal noise reduction. The task becomes really challenging in the case of implantable devices, because power consumption is restricted to few tens mu W. In this paper, two different circuit techniques aimed to reduce flicker and thermal noise, in ultra-low noise amplifiers for implantable electronics are demonstrated. In both cases circuit design and measurement results are presented, showing an excellent performance in circuit simplicity, and noise to power consumption trade-off. The first circuit is a very simple G(m)-C chopper low-pass amplifier for flicker noise cancellation. It consumes only 28mW, with a measured input referred noise and offset of 1.2 nV/root Hz and 2.5 mu V, respectively. For the reduction of thermal noise with minimum power consumption, in the second circuit, a ultra-low noise amplifier, a energy-efficient DC-DC downconverter, and low voltage design techniques are combined. Measured input referred noise in this case was 5,5 nV/root Hz at only 380 mu W power consumption. Both circuits were fabricated in a 1,5 micron technology.
引用
收藏
页码:65 / 70
页数:6
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