Design of interfaces between high speed data converters and high performance FPGAs for software defined radio applications

被引:4
|
作者
Balakrishnan, Mahadevan [1 ]
Meerja, Khalim Amjad [2 ]
Gundugonti, Kishore Kumar [2 ]
Kalva, Sri Rama Krishna [2 ]
机构
[1] Qualcomm, Markham, ON, Canada
[2] VR Siddhartha Engn Coll, Dept Elect & Commun, Vijayawada, Andhra Pradesh, India
关键词
ADC; DAC; SDR; FPGA; LVDS; CMOS; SFDR;
D O I
10.1007/s11235-018-00539-3
中图分类号
TN [电子技术、通信技术];
学科分类号
0809 ;
摘要
Software defined radio (SDR) is a vast and emerging field that requires the design of various technologies such as antenna, RF, IF, and digital baseband subsystems. Among all these technologies, data converters that convert signals between analog and digital domains are highly crucial. On the other hand field programmable gate arrays (FPGAs) based platforms are being preferred for evaluating and implementing the digital communication concepts due to their programmability and reconfigurability. As a result they are well suited for the design of SDR technology. In this research work, we develop a platform where high-speed data converters are interfaced with high performance FPGAs. Interfaces are designed for analog-to-digital convertors (ADC) and digital-to-analog convertors (DAC) to communicate with FPGAs. For the interface design between ADC and FPGA, a double data rate and a low voltage differential signalling based serial output is adopted. And, for the interface design between DAC and other FPGA, parallel complementary metal oxide semiconductor outputs are used. To reconfigure the modes and parameters of the data convertors, serial peripheral interface data controllers have been designed. We have through simulations evaluated the performance of our designed interfaces between data convertors and FPGAs.
引用
收藏
页码:601 / 614
页数:14
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