End-to-end schedulability tests for multiprocessor embedded systems based on networks-on-chip with priority-preemptive arbitration

被引:50
|
作者
Indrusiak, Leandro Soares [1 ]
机构
[1] Univ York, Dept Comp Sci, Real Time Syst Grp, York YO10 5DD, N Yorkshire, England
关键词
Network-on-chip; Embedded systems; Hard real-time;
D O I
10.1016/j.sysarc.2014.05.002
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Simulation-based techniques can be used to evaluate whether a particular NoC-based platform configuration is able to meet the timing constraints of an application, but they can only evaluate a finite set of scenarios. In safety-critical applications with hard real-time constraints, this is clearly not sufficient because there is an expectation that the application should be schedulable on that platform in all possible scenarios. This paper presents a particular NoC-based multiprocessor architecture, as well as a number of analytical methods that can be derived from that architecture, aiming to allow designers to check, for a given platform configuration, whether all application tasks and communication messages always meet their hard real-time constraints in every possible scenario. Experiments are presented, showing the use of the proposed methods when evaluating different task mapping and platform topologies. (C) 2014 Elsevier B.V. All rights reserved.
引用
收藏
页码:553 / 561
页数:9
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