Reconfigurable parallel computing architecture for on-board data processing

被引:0
|
作者
Syed, Mohsin A. [1 ]
Schueler, Eberhard [2 ]
机构
[1] EADS Astrium GmbH, D-81663 Munich, Germany
[2] PACT XPP Technol AG, D-80939 Munich, Germany
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The increasing use of new earth-observation and communication technologies coupled with rapidly changing customer needs require a high performance and flexible processing technology for on-board data processing. Currently available processors for space cannot handle processing such a large magnitude. An alternative approach would be the development of application specific ICs (ASICs) which offer high processing power, but the lack of flexibility for adaptation to emerging standards and improvements is a major disadvantage. The extreme Processing Platform (XPP) developed by PACT AG offers a solution to this dilemma by providing the flexibility of a processor kernel along with the performance similar to an ASIC. The XPP is a runtime reconfigurable data processing technology built using a scalable array of arithmetic processing units, embedded memories, high bandwidth I/O, a packet oriented internal network and designed to support parallelism. This paper gives an overview of the APP core architecture, compares the If technology with currently available space processors, assesses the implementation of wavelet transformation algorithm on XPP and the transfer of XPP architecture to a radiation tolerant semiconductor technology.
引用
下载
收藏
页码:229 / +
页数:2
相关论文
共 50 条
  • [1] OBC-NG: Towards a Reconfigurable On-board Computing Architecture for Spacecraft
    Luedtke, Daniel
    Westerdorff, Karsten
    Stohlmann, Kai
    Boerner, Anko
    Maibaum, Olaf
    Peng, Ting
    Weps, Benjamin
    Fey, Goerschwin
    Gerndt, Andreas
    [J]. 2014 IEEE AEROSPACE CONFERENCE, 2014,
  • [2] Parallel accelerated computing architecture for dim target tracking on-board
    Yu, Jiyang
    Huang, Dan
    Li, Wenjie
    Wang, Xianjie
    Shi, Xiaolong
    [J]. COMPUTATIONAL INTELLIGENCE, 2024, 40 (01)
  • [3] Reconfigurable and Evolvable Architecture for Autonomous on-board systems
    Shiyanovskii, Yuriy
    Wolff, Francis
    Papachristou, Chris
    McIntyre, David
    [J]. NAECON 2008 - IEEE NATIONAL AEROSPACE AND ELECTRONICS CONFERENCE, 2008, : 225 - +
  • [4] Reconfigurable on-board payload data processing system developments at the European Space Agency
    Wijmans, W
    Armbruster, P
    [J]. IMAGING SPECTROMETRY VI, 2000, 4132 : 91 - 98
  • [5] A reconfigurable parallel architecture for image computing
    Li, Jian
    An, Xiangjing
    Ye, Lei
    He, Hangen
    [J]. WCICA 2006: SIXTH WORLD CONGRESS ON INTELLIGENT CONTROL AND AUTOMATION, VOLS 1-12, CONFERENCE PROCEEDINGS, 2006, : 820 - 820
  • [6] Reconfigurable On-Board Vision Processing for Small Autonomous Vehicles
    Fife, Wade S.
    Archibald, James K.
    [J]. EURASIP JOURNAL ON EMBEDDED SYSTEMS, 2007, (01)
  • [7] GPU FOR PARALLEL ON-BOARD HYPERSPECTRAL IMAGE PROCESSING
    Setoain, Javier
    Prieto, Manuel
    Tenllado, Christian
    Tirado, Francisco
    [J]. INTERNATIONAL JOURNAL OF HIGH PERFORMANCE COMPUTING APPLICATIONS, 2008, 22 (04): : 424 - 437
  • [8] Space based radar on-board processing architecture
    Vaillancourt, S.
    [J]. 2005 IEEE Aerospace Conference, Vols 1-4, 2005, : 2190 - 2195
  • [9] The on-board data processing of the AGILE satellite
    Andrea Argan
    Marco Tavani
    Alessio Trois
    [J]. Rendiconti Lincei. Scienze Fisiche e Naturali, 2019, 30 : 199 - 205
  • [10] The on-board data processing of the AGILE satellite
    Argan, Andrea
    Tavani, Marco
    Trois, Alessio
    [J]. RENDICONTI LINCEI-SCIENZE FISICHE E NATURALI, 2019, 30 (SUPPL 1) : 199 - 205