CMOS compatible cost-efficient fabrication of SOI grating couplers

被引：15

作者：

Bolten, Jens ^{[1
]}

Hofrichter, Jens ^{[2
]}

Moll, Nikolaj ^{[2
]}

Schoenenberger, Sophie ^{[2
]}

Horst, Folkert ^{[2
]}

Offrein, Bert J. ^{[2
]}

Wahlbrink, Thorsten ^{[1
]}

Mollenhauer, Thomas ^{[1
]}

Kurz, Heinrich ^{[1
]}

机构：

[1] AMO GmbH, AMICA, D-52074 Aachen, Germany

[2] IBM Res, Zurich Res Lab, CH-8803 Ruschlikon, Switzerland

来源：

MICROELECTRONIC ENGINEERING | 2009年 / 86卷 / 4-6期

关键词：

Electron beam lithography; HSQ; Silicon photonics; Fibre-to-chip coupling; Grating couplers;

D O I：

10.1016/j.mee.2008.11.038

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A CMOS compatible process for the cost-efficient fabrication of SOI grating couplers is presented. Test devices have been fabricated and characterized in a fully automated measurement setup at telecom wavelength (1550 nm). Coupling efficiencies of -3.6 and -4.1 dB have been achieved for TE and TM polarization respectively The 3 dB bandwidth has been measured to be about 50 nm. (C) 2008 Elsevier B.V. All rights reserved.

引用

页码：1114 / 1116

页数：3

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