3-D Technology Assessment: Path-Finding the Technology/Design Sweet-Spot

被引:38
|
作者
Marchal, Paul [1 ]
Bougard, Bruno [1 ]
Katti, Guruprasad [1 ,2 ]
Stucchi, Michele [1 ]
Dehaene, Wim [1 ,2 ]
Papanikolaou, Antonis [1 ]
Verkest, Diederik [1 ]
Swinnen, Bart [1 ]
Beyne, Eric [1 ]
机构
[1] IMEC VZW, B-3001 Louvain, Belgium
[2] Katholieke Univ Leuven, B-3001 Louvain, Belgium
关键词
Design automation; design centering; integrated circuit design; technology assessment; MEMORY; SYSTEM;
D O I
10.1109/JPROC.2008.2007471
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
It is widely acknowledged that three-dimensional (3-D) technologies offer numerous opportunities for system design. in recent years, significant progress has been made on these 3-D technologies, and they have become probably the best hope for carrying the semiconductor industry beyond the path of Moore's law. However, a clear roadmap is missing to successfully introduce this 3-D technology onto the market. Today, a plurality of 3-D technology options exists, which requires different design and test strategies. To crystallize the many technology options in a few mainstream technologies, it is mandatory to coexplore both technology and design options. The contribution of this paper is to introduce a novel path finding methodology to untangle the many intertwined design/technology options. This holistic approach will be applied on a representative 3-D case study. Initial results demonstrate the benefits of the proposed path-finding methodology to steer the technology development and fine-tune design strategies.
引用
收藏
页码:96 / 107
页数:12
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