An Accurate Modelling of CMOS Folded Cascode Op-Amp with Negative Transconductance

被引：1
|
作者：
Krishnanunni, B. [1 ]
Rajagopal, Devraj M. [1 ]
Sinha, Rohan [1 ]
机构：
[1] Texas Instruments Inc, Bengaluru, India
来源：
2022 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS 22) | 2022年
关键词：
Amplifier; Folded Cascode; Small Signal Modelling; Negative Transconductance; Output Resistance; Gain;
D O I：
10.1109/ISCAS48785.2022.9937865
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper presents a comprehensive analysis of the impact of negative transconductance in folded cascode Operational Amplifier (Op-Amp). An analytical study with small signal model is presented and summarized with respect to the performance of folded cascode op-amp implemented in 110nm CMOS process. The small signal model satisfactorily illustrates the behavior of the amplifier's output resistance taking negative transconductance into account. Furthermore, design guidelines and mathematical equations are provided for maximizing output resistance
引用
收藏
页码：2928 / 2932
页数：5
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