A 14-b 500 MSPS Time-Interleaved Analog-to-Digital Converter with Digital Background Calibration

被引：0

作者：

Huang, Xingfa ^{[1
]}

Fu, Dongbing ^{[2
]}

Hu, Rongbin ^{[1
]}

Pu, Jie ^{[1
]}

Shen, Xiaofeng ^{[1
]}

Li, Jing ^{[2
]}

Li, Liang ^{[1
]}

机构：

[1] Sci & Technol Analog Integrated Circuit Lab, Chongqing 400060, Peoples R China

[2] CETC, SISC, Chongqing 400060, Peoples R China

来源：

PROCEEDINGS OF THE 3RD INTERNATIONAL CONFERENCE ON MATERIAL, MECHANICAL AND MANUFACTURING ENGINEERING | 2015年 / 27卷

关键词：

A/D converter; time-interleaved ADC; digital calibration;

D O I：

暂无

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

This paper presents a 14-bit 500MSPS ADC in 0.18 um CMOS process. By interleaving two 250MSPS ADCs, a sample rate of 500MSPS is achieved. The offset, gain error and time skew between the two channels are calibrated in the background. The measurement shows that the ADC has performances of 10.6 bits ENOB, 78dBc SFDR, 4 by 4 square micrometers area and 950mW power consumption under power supply of 1.8V.

引用

页码：934 / 937

页数：4

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