Estimation of quantum mechanical and polysilicon depletion effects for ultra-thin silicon-dioxide gate dielectric

This paper presents a simple methodology to estimate the impact of inversion layer quantization and polysilicon-gate depletion effects on ultra-thin silicon-dioxide gate dielectric. We have used process and device simulation to determine the physical oxide thickness from the measured capacitance data, and the corresponding effective gate oxide thickness at inversion was computed from the simulation data obtained with and without the quantum mechanical and polysilicon depletion effects. The simulation results indicate that the effective gate oxide thickness is significantly higher than the physically grown oxide thickness due to inversion layer quantization and polysilicon depletion effects. The increase in oxide thickness is strongly dependent on the supply voltage and is more than 0.6 nm at 1 V. We have, also, measured the gate-leakage current for the same devices with gate oxide thickness less than 3 nm. Our data, also, show that in order to maintain a leakage current greater than or equal to 1 A/cm(2) for 1 V operation, the effective gate oxide thickness must be greater than or equal to 2.2 nm.