Data alignment for multi-channel high-speed interfaces using PRBS patterns

被引：0

作者：

Lee, Seung-Woo ^{[1
]}

Hwang, In-Ki ^{[1
]}

Kang, Hun-Sik ^{[1
]}

机构：

[1] ETRI, Opt Network Res Grp, Daejeon, South Korea

来源：

2018 20TH INTERNATIONAL CONFERENCE ON ADVANCED COMMUNICATION TECHNOLOGY (ICACT) | 2018年

关键词：

bit synchronization; data alignment; multi-channel I/O; PRBS patterns;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Multiple FPGAs are used for high speed and large amount of data transfer and also designed to implement DSP functions. The consecutive PRBS patterns are used for bit synchronization and data alignment between high-speed multi-channel interfaces of FPGAs.

引用

页码：625 / 627

页数：3

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