Transistor level fault diagnosis in digital circuits using artificial neural network

In the design of digital circuits, transistor level faults occur due to open or shorted connection in the transistor terminals and with the variations in the transistor parameters. In this study fault diagnosis for hard faults in the digital circuits using artificial neural network and virtual instrument is presented. During the diagnosis process the parametric variations in transistors are also taken into account by varying the threshold voltages of the transistors. The output responses of the circuit under test under faulty and fault free conditions are plotted for all the input combinations. The resulting responses are curve fitted using polynomial curve fitting. The polynomial coefficients are used as signatures values to train the back propagation artificial neural network, which in turn is used for fault classification. The virtual instrument is designed to implement the fault diagnosis system. The system is validated with experiments on universal gates and all the proposed faults are correctly diagnosed. (C) 2015 Elsevier Ltd. All rights reserved.