A standard-cell placement tool for designs with high row utilization

被引：7
|
作者：
Yang, XJ [1 ]
Choi, BK [1 ]
Sarrafzadeh, M [1 ]
机构：
[1] Univ Calif Los Angeles, Dept Comp Sci, Los Angeles, CA 90095 USA
来源：
ICCD'2002: IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS AND PROCESSORS, PROCEEDINGS | 2002年
关键词：
D O I：
10.1109/ICCD.2002.1106746
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
In this paper we study the correlation between wirelength and routability for standard-cell placement problem, under the modern place-androute environment. We present a placement tool named Dragon (version 2,1), and show its ability to produce good quality placement for designs with high row utilization. Compared to an industrial placer and an academic state-of-the-art placer Dragon can produce placement with better routability and shorter total wirelength. We describe many novel algorithmic details and implementation details of this placement tool. Experimental results show that minimizing wirelength improves routability and layout quality.
引用
收藏
页码：45 / 47
页数：3
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