Horizontal, Stacked or Vertical Silicon Nanowires: Does it Matter from a Low-Frequency Noise Perspective?

被引:2
|
作者
Simoen, Eddy [1 ]
de Oliveira, Alberto Vinicius [2 ]
Der Agopian, Paula Ghedini [3 ,4 ]
Ritzenthaler, Romain [1 ]
Mertens, Hans [1 ]
Horiguchi, Naoto [1 ]
Martino, Joao Antonio [4 ]
Claeys, Cor [5 ]
Veloso, Anabela [1 ]
机构
[1] IMEC, Kapeldreef 75, B-3001 Leuven, Belgium
[2] UTFPR, Campus Toledo, Toledo, Parana, Brazil
[3] Sao Paulo State Univ, UNESP, Sao Joao Da Boa Vista, Brazil
[4] Univ Sao Paulo, LSI PSI USP, Sao Paulo, Brazil
[5] Katholieke Univ Leuven, EE Depart, Kasteelpk Arenberg 10, B-3001 Leuven, Belgium
关键词
Gate-All-Around; Nanowires; Nanosheets; Low-frequency noise; IMPACT; JUNCTIONLESS; METAL;
D O I
10.1109/EUROSOI-ULIS49407.2020.9365338
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This work reviews the low-frequency noise performance of different flavors of silicon Gate-All-Around Nanowire (NW) (or Nanosheet - NS) transistors. For the horizontal devices, the 1/f-like noise is dominated by the number fluctuations mechanism, so that the Power Spectral Density (PSD) is directly proportional with the trap density in the gate stack. The impact of different process options and device architectures (junctionless versus inversion mode) is discussed. Overall, it is found that the average 1/f noise PSD is reducing going from single NW transistors on Silicon-on-Insulator substrates, to stacked horizontal NS devices and, finally, vertical NW FETs. In the latter case, white noise may dominate the lowfrequency noise spectrum.
引用
收藏
页数:6
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