共 2 条
0.8-V Supply Voltage Deep-Submicrometer Inversion-Mode In0.75Ga0.25As MOSFET
被引:72
|作者:
Wu, Y. Q.
[1
,2
]
Wang, W. K.
[3
]
Koybasi, O.
[1
,2
]
Zakharov, D. N.
[1
,2
]
Stach, E. A.
[1
,2
]
Nakahara, S.
[3
]
Hwang, J. C. M.
[3
]
Ye, P. D.
[1
,2
]
机构:
[1] Purdue Univ, Sch Elect & Comp Engn, W Lafayette, IN 47907 USA
[2] Purdue Univ, Birck Nanotechnol Ctr, W Lafayette, IN 47907 USA
[3] Lehigh Univ, Dept Elect & Comp Engn, Bethlehem, PA 18105 USA
基金:
美国国家科学基金会;
关键词:
Atomic layer deposition;
high-k;
InGaAs;
MOSFET;
HIGH-PERFORMANCE;
INGAAS MOSFET;
GATE STACK;
ENHANCEMENT;
CHANNEL;
TRANSISTOR;
MOBILITY;
HFALO;
D O I:
10.1109/LED.2009.2022346
中图分类号:
TM [电工技术];
TN [电子技术、通信技术];
学科分类号:
0808 ;
0809 ;
摘要:
We report the experimental demonstration of deep-submicrometer inversion-mode In0.75Ga0.25As MOSFETs with ALD high-k Al2O3 as gate dielectric. In this letter, n-channel MOSFETs with 100-200-nm-long gates have been fabricated. At a supply voltage of 0.8 V, the fabricated devices with 200-130-nm-long gates exhibit drain currents of 232-440 mu A/mu m and transconductances of 538-705 mu S/mu m. The 100-nm device has a drain current of 801 mu A/mu m and a transconductance of 940 mu S/mu m. However, the device cannot be pinched off due to severe short-channel effect. Important scaling metrics, such as on/off current ratio, subthreshold swing, and drain-induced barrier lowering, are presented, and their relations to the short-channel effect are discussed.
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页码:700 / 702
页数:3
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