MPEG-4 video codec on BOPS parallel DSP

被引：0
|
作者：
Petrescu, DI [1 ]
Searles, DS [1 ]
Pechanek, GG [1 ]
机构：
[1] BOPS Inc, Mt View, CA 94043 USA
来源：
PARALLEL AND DISTRIBUTED COMPUTING SYSTEMS | 2002年
关键词：
parallel and distributed applications; digital signal and image processing;
D O I：
暂无
中图分类号：
TP18 [人工智能理论];
学科分类号：
081104 ; 0812 ; 0835 ; 1405 ;
摘要：
This paper presents an MPEG-4 simple profile video codec implemented on a BOPS(R) parallel programmable low power DSP. The encoder and decoder are designed to benefit from the multiple levels of parallelism available in the architecture and the features of the implementation are described. The codec is able to encode 30 frames/s of CIF at between 20 and 37 MHz, depending on the amount of motion detected between frames. It is also capable of decoding 30 frames/s of CIF at 384 kbit/s at 20 MHz, and 15 frames/s of QCIF at 64 kbit/s at 3 MHz. Post-processing is added to the decoder to enhance the visual quality for low bit rate coded video sequences.
引用
收藏
页码：122 / 127
页数：6
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