Hardware Cost Design Optimization for Functional Safety-Critical Parallel Applications on Heterogeneous Distributed Embedded Systems

Industrial embedded systems are cost sensitive, and hardware cost of industrial production should be reduced for high profit. The functional safety requirement must be satisfied according to industrial functional safety standards. This study proposes three hardware cost optimization algorithms for functional safety-critical parallel applications on heterogeneous distributed embedded systems during the design phase. The explorative hardware cost optimization (EHCO), enhanced EHCO (EEHCO), and simplified EEHCO (SEEHCO) algorithms are proposed step by step. Experimental results reveal that EEHCO can obtain minimum hardware cost, whereas SEEHCO is efficient for large-scale parallel applications compared with the existing algorithms.