Multi-Layer MoS2 FET with Small Hysteresis by Using Atomic Layer Deposition Al2O3 as Gate Insulator

被引：52
|
作者：
Cho, Ah-Jin [1 ,2 ]
Yang, Suk [1 ,2 ]
Park, Kyung [2 ]
Namgung, Seok Daniel [1 ,2 ]
Kim, Hojoong [1 ,2 ]
Kwon, Jang-Yeon [1 ,2 ]
机构：
[1] Yonsei Univ, Sch Integrated Technol, Inchon 406840, South Korea
[2] Yonsei Inst Convergence Technol, Inchon 406840, South Korea
来源：
ECS SOLID STATE LETTERS | 2014年 / 3卷 / 10期
关键词：
HIGH-PERFORMANCE; TRANSISTORS;
D O I：
10.1149/2.0111409ssl
中图分类号：
T [工业技术];
学科分类号：
08 ;
摘要：
Two-dimensional materials like graphene have great potential to excess the mobility limit of conventional silicon devices. Particularly, MoS2 FETs have high mobility and low off-current simultaneously due to their sizable band-gap. However, large hysteresis in its transfer curve is an obstacle for implementation to logic circuits and switching devices. Here, we report on a multi-layer MoS2 FET using atomic layer deposition Al2O3 as a gate insulator, showing small hysteresis of 0.86 V. It is thought that, such improvement in the hysteresis attributes to the small trap at the MoS2/Al2O3 interface, and it is confirmed through a constant current stress test. (C) 2014 The Electrochemical Society. All rights reserved.
引用
收藏
页码：Q67 / Q69
页数：3
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