Fast One-Time Programming (OTP) and a Programming Verification Solution using Zener Diodes in a Standard CMOS Process

被引:0
|
作者
Trontelj, Janez [1 ]
机构
[1] Fac Elect Engn, Ljubljana, Slovenia
关键词
OTP; Zener zap; ASIC; DAQ; burn pulse; antifuse;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This article describes an effective, low-cost solution for sequential, one-time programming (OTP) and verification of zener diodes in an electronic micro-system. Using the proper structures of zener diodes (also known as 'zener zap') in a standard CMOS process, it is possible to achieve better accuracy in high-precision integrated circuits. For this purpose a solution has been developed for fast programming and programming verification of several zener zap structures on the ASIC (Application Specific Integrated Circuit). The entire zapping process for 250 zener zap structures is completed in the range of a few tens of milliseconds. This solution has been implemented for wafer sorting, and as well for packaged integrated circuits. It was successfully verified in the industrial production of more than ten million-high precision, electronic micro-systems with a remarkable overall yield of 97%.
引用
收藏
页码:104 / 108
页数:5
相关论文
共 6 条
  • [1] One time programming (OTP) with zener diodes in CMOS processes
    Teichmann, J
    Burger, K
    Hasche, W
    Herrfurth, J
    Täschner, G
    ESSDERC 2003: PROCEEDINGS OF THE 33RD EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE, 2003, : 433 - 436
  • [2] Three-transistor one-time programmable (OTP) ROM cell array using standard CMOS gate oxide antifuse
    Kim, J
    Lee, K
    IEEE ELECTRON DEVICE LETTERS, 2003, 24 (09) : 589 - 591
  • [3] A Complete One-Time Passwords (OTP) Solution Using Microservices: A Theoretical and Practical Approach
    Almeida, Luis E.
    Fernandez, Brayan A.
    Zambrano, Daliana
    Almachi, Anthony I.
    Pillajo, Hilton B.
    Yoo, Sang Guun
    INNOVATIONS FOR COMMUNITY SERVICES, I4CS 2023, 2023, 1876 : 68 - 86
  • [4] A 2-Kb One-Time Programmable Memory for UHF Passive RFID Tag IC in a Standard 0.18 μm CMOS Process
    Ngoc Dang Phan
    Chang, Ik Joon
    Lee, Jong-Wook
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2013, 60 (07) : 1810 - 1822
  • [5] Fast adaptive DC-DC conversion using dual-loop one-cycle control in standard digital CMOS process
    Ma, D
    Ki, WH
    Tsui, CY
    ASP-DAC 2004: PROCEEDINGS OF THE ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, 2004, : 539 - 540
  • [6] Fast adaptive DC-DC conversion using dual-loop one-cycle control in standard digital CMOS process
    Ma, D. (ma@ece.lsu.edu), IEEE Circuits and Systems Society; ACM SIGDA; IEICE; Information Processing of Japan; et al (Institute of Electrical and Electronics Engineers Inc.):