A power factor correction with voltage doubler rectifier

被引:0
|
作者
Yamamoto, I [1 ]
Matsui, K [1 ]
Ueda, F [1 ]
机构
[1] Chubu Univ, Dept Elect Engn, Kasugai, Aichi 4878501, Japan
关键词
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
For small capacity rectifier circuits with a small capacity, such as those for consumer electronics and appliances, capacitor input type rectifier circuits are generally used. Consequently, various harmonics generated within the power system become a serious problem. Various studies of this effect have been presented previously so far However, most of these employ switching devices, such as FETs and the like. The absence of switching devices makes systems more tolerant to over-load, and brings low radio noise benefits. We propose a power factor correction scheme using a voltage doubler rectifier without switching devices. In this method, the input current is divided into two periods, where one period charge the small input capacitor and the other charge the large output capacitor By dividing the input current into two different modes, the current conduction period can be widened and harmonics can largely be canceled between the two modes. Hence, the harmonic characteristics can be significantly improved, whereby the lower order harmonics, such as the fifth and seventh orders, are much reduced. The results are confirmed by theoretical and experimental implementations.
引用
收藏
页码:2641 / 2647
页数:7
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