A design of low-area low drop-out regulator using body bias technique

A Low-area Low Drop-out (LDO) regulator using the body biasing technique is presented. The body biasing technique can decrease the threshold voltage and increase the drain current. The technique is applied to the error amplifier, voltage buffer and pass transistor in the proposed LDO regulator to reduce chip size and provide the proposed LDO regulator with the same performance as the conventional LDO regulator. A pass transistor using the technique can reduce its size by 5.5% at 100 mA load condition. The proposed current mirror in the error amplifier and voltage buffer has about 61% smaller area at coterminous performance. The proposed LDO regulator showed about 26% smaller area, not including the bias blocks, while it showed coterminous performance and characteristics.