CMOS Analog Amplifier Circuits Design Using Seeker Optimization Algorithm

被引:8
|
作者
Maji, K. B. [1 ]
De, B. P. [2 ]
Kar, R. [1 ]
Mandal, D. [1 ]
Ghoshal, S. P. [3 ]
机构
[1] NIT, Dept ECE, Durgapur, W Bengal, India
[2] KIIT Univ, SOEE, Bhubaneswar, Odisha, India
[3] NIT, Dept EE, Durgapur, W Bengal, India
关键词
Differential amplifier; Low power design; Optimization; SOA; Transistor sizing; Two-stage Op-amp;
D O I
10.1080/03772063.2019.1649207
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This article proposes an area optimized design approach for two different analogue VLSI circuits: current mirror load based CMOS differential amplifier circuit and CMOS two-stage operational amplifier. The evolutionary method utilized for these optimal designs is the Seeker Optimization Algorithm (SOA). Human searching capability and understanding are modelled in SOA. In SOA, the search direction is based on the empirical gradient, and the step length is based on some simple fuzzy rule. In this article, SOA is employed to optimize the sizes of the MOS transistors to reduce the overall MOS area occupied by the circuit while satisfying the design constraints. The results obtained from the SOA technique are validated in SPICE environment. SPICE-based simulation results justify that SOA is a much better technique in comparison with the other formerly reported methods for the designs of the circuits mentioned above in terms of MOS area, gain, power dissipation, etc.
引用
收藏
页码:1376 / 1385
页数:10
相关论文
共 50 条
  • [1] Design of Optimal CMOS Analog Amplifier Circuits Using a Hybrid Evolutionary Optimization Technique
    De, Bishnu Prasad
    Maji, Kanchan Baran
    Kar, Rajib
    Mandal, Durbadal
    Ghoshal, Sakti Prasad
    [J]. JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2018, 27 (02)
  • [2] Optimization of CMOS Analog Circuits Using Sine Cosine Algorithm
    Majeed, M. A. Mushahhid
    Rao, Patri Srihari
    [J]. 2017 8TH INTERNATIONAL CONFERENCE ON COMPUTING, COMMUNICATION AND NETWORKING TECHNOLOGIES (ICCCNT), 2017,
  • [3] A Comparative Study of Design of Analog CMOS Circuits Using Numerical Optimization Strategies
    Sridhar, Sabarish
    Raghuram, S.
    [J]. 2015 INTERNATIONAL CONFERENCE ON TRENDS IN AUTOMATION, COMMUNICATIONS AND COMPUTING TECHNOLOGY (I-TACT-15), 2015,
  • [4] Automated design method for parameters optimization of CMOS analog circuits based on adaptive genetic algorithm
    Yu, Jianhai
    Mao, Zhigang
    [J]. ASICON 2007: 2007 7TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, 2007, : 1217 - 1220
  • [5] Automated sizing of low-noise CMOS analog amplifier using ALCPSO optimization algorithm
    Singh, Chabungbam Lison
    Anandini, Chabungbam
    Gogoi, Ashim Jyoti
    Baishnab, K. L.
    [J]. JOURNAL OF INFORMATION & OPTIMIZATION SCIENCES, 2018, 39 (01):
  • [6] Butterworth Filter Design using Seeker Optimization Algorithm
    Maji, K. B.
    Sree, U. Soumika
    Kar, R.
    Mandal, D.
    Ghoshal, S. P.
    [J]. 2015 INTERNATIONAL CONFERENCE ON SCIENCE AND TECHNOLOGY (TICST), 2015, : 298 - 302
  • [7] Optimal sizing of CMOS analog circuits using gravitational search algorithm with particle swarm optimization
    S. Mallick
    R. Kar
    D. Mandal
    S. P. Ghoshal
    [J]. International Journal of Machine Learning and Cybernetics, 2017, 8 : 309 - 331
  • [8] Optimal sizing of CMOS analog circuits using gravitational search algorithm with particle swarm optimization
    Mallick, S.
    Kar, R.
    Mandal, D.
    Ghoshal, S. P.
    [J]. INTERNATIONAL JOURNAL OF MACHINE LEARNING AND CYBERNETICS, 2017, 8 (01) : 309 - 331
  • [9] Two Stage CMOS Operational Amplifier Design Using Particle Swarm Optimization Algorithm
    Prajapati, Pankaj P.
    Shah, Mihir V.
    [J]. 2015 IEEE UP SECTION CONFERENCE ON ELECTRICAL COMPUTER AND ELECTRONICS (UPCON), 2015,
  • [10] Efficient butterfly inspired optimization algorithm for analog circuits design
    Lberni, Abdelaziz
    Marktani, Malika Alami
    Ahaitouf, Abdelaziz
    Ahaitouf, Ali
    [J]. MICROELECTRONICS JOURNAL, 2021, 113