共 10 条
- [1] A Memory Congestion-aware MPI Process Placement for Modern NUMA Systems 2017 IEEE 24TH INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING (HIPC), 2017, : 152 - 161
- [3] Online MPI process mapping for coordinating locality and memory congestion on NUMA systems 1600, South Ural State University, Publishing Center (07): : 71 - 90
- [4] An Automatic MPI Process Mapping Method Considering Locality and Memory Congestion on NUMA Systems 2019 IEEE 13TH INTERNATIONAL SYMPOSIUM ON EMBEDDED MULTICORE/MANY-CORE SYSTEMS-ON-CHIP (MCSOC 2019), 2019, : 17 - 24
- [5] Congestion-Aware Memory Management on NUMA Platforms: A VMware ESXi case study PROCEEDINGS OF THE 2017 IEEE INTERNATIONAL SYMPOSIUM ON WORKLOAD CHARACTERIZATION (IISWC), 2017, : 146 - 155
- [6] NUMA-BTDM: A thread mapping algorithm for balanced data locality on NUMA systems 2016 17TH INTERNATIONAL CONFERENCE ON PARALLEL AND DISTRIBUTED COMPUTING, APPLICATIONS AND TECHNOLOGIES (PDCAT), 2016, : 317 - 320
- [8] Locality and Balance for Communication-Aware Thread Mapping in Multicore Systems EURO-PAR 2015: PARALLEL PROCESSING, 2015, 9233 : 196 - 208
- [9] Congestion-aware core mapping for Network-on-Chip based systems using betweenness centrality FUTURE GENERATION COMPUTER SYSTEMS-THE INTERNATIONAL JOURNAL OF ESCIENCE, 2018, 82 : 459 - 471
- [10] Congestion-aware charging management for ride-hailing systems with time-varying energy prices 2024 INTERNATIONAL CONFERENCE ON SYSTEM SCIENCE AND ENGINEERING, ICSSE 2024, 2024,