A Potential-Based Characterization of the Transfer Gate in CMOS Image Sensors

被引：8
|
作者：
Xu, Yang [1 ]
Ge, Xiaoliang [1 ]
Theuwissen, Albert J. P. [1 ,2 ]
机构：
[1] Delft Univ Technol, Elect Instrumentat Lab, NL-2628 CD Delft, Netherlands
[2] Harvest Imaging, B-3960 Bree, Belgium
来源：
IEEE TRANSACTIONS ON ELECTRON DEVICES | 2016年 / 63卷 / 01期
关键词：
CMOS image sensor (CIS); full well capacity (FWC); pinning voltage; potential barrier; transfer gate (TG); PIXELS; CCD;
D O I：
10.1109/TED.2015.2452213
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A method to characterize the transfer gate (TG)-related parameters in a 4 T pixel is presented. The method is based on the pinning voltage measurement, which is proposed by Tan et al. [1] Using this method, the TG ON and OFF surface potential can be characterized. Based on the TG ON potential characterization, and according to the MOSFET model, the TG channel doping and the oxide thickness can be extracted from the measurements. Based on the TG OFF potential characterization, the TG surface potential dependence on the TG design parameters and the pixel biasing condition are analyzed. Using this method, whether the device is suffering from the drain-introduced barrier lowering effect or the short channel effect can be easily determined.
引用
收藏
页码：42 / 48
页数：7
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