Effects of Grain Size on the Electrical Characteristics of Three-Dimensional NAND Flash Memory Devices

被引:1
|
作者
Lee, Jun Gyu [1 ]
Kim, Tae Whan [1 ]
机构
[1] Hanyang Univ, Dept Elect & Comp Engn, Seoul 04763, South Korea
基金
新加坡国家研究基金会;
关键词
Vertical NAND Flash Memory; Polysilicon Channel; Charge Trapping Layer; Threshold Voltage Shift; BOUNDARY TRAPS; IMPROVEMENT;
D O I
10.1166/jnn.2019.17015
中图分类号
O6 [化学];
学科分类号
0703 ;
摘要
Polysilicon is commonly used as the channel in three-dimensional (3D) NAND flash memory devices. However, degradation of device performance due to grain boundary traps in the channel is a major issue. The saturation on-current level, threshold voltage (V-th), and electron density of 3D NAND flash memory devices with randomly generated grain boundaries were investigated by using three-dimensional technology computer-aided design (TCAD) simulation. The device performance tended to degrade with an increasing number of grains, and the direction of the grains significantly affected the device performance. The large decrease in the electron density of the channel region due to the direction of the grains can be explained according to the formation of the depletion region.
引用
收藏
页码:6202 / 6205
页数:4
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